Current Projects

Halogen-Free Projects

BFR/PVC Cables & Wires

HDP User Group Project Facilitator: Jack Fisher

Synopsis: A coordinated activity within the materials/cables manufacturers/ OEMs supply chain to quickly and thoroughly evaluate the phase out of BFR/PVC in wires and cables.
  Cables/Wires include:
–Internal cables/wires: SATA, ribbon…
–External cables: USB cables, wired peripheral cables (e.g. mouse, keyboard, webcams, microphones…)
–Power Cords and Power Adaptor cords

For additional information visit the BFR/PVC Cables & Wires page or contact the HDP User Group Project Facilitator listed above.

Halogen-Free Materials Database

HDP User Group Project Facilitator: Jack Fisher

Synopsis: Create a comprehensive online and searchable database of the properties and performance of Halogen Free components and materials available. Use the same test methods and sample preparation to generate the data, and present every supplier’s data in the same format.

For additional information visit the Halogen-Free Materials Database page or contact the HDP User Group Project Facilitator listed above.

Halogen-Free Assembly Reliability Phase 2

HDP User Group Project Facilitator: Jack Fisher

Synopsis: Identify a PWB assembly that represents the more complex types of systems that want to go Halogen Free. Locate suppliers of Halogen Free components and assemble the boards using a Lead Free process. Test and evaluate the PWBAs to verify performance and reliability.

For additional information visit the Halogen-Free Assembly Reliability Phase 2 page or contact the HDP User Group Project Facilitator listed above.

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Lead Free Projects

Lead Free Board Materials Reliability Phase 2

HDP User Group Project Facilitator: Brian Smith

Synopsis: This is a follow up to the Lead Free Board Materials Reliability Project.  For more information visit the Lead Free Board Materials Reliability project page.

For additional information visit the Lead Free Board Materials Reliability Phase 2 page or contact the HDP User Group Project Facilitator listed above.

Lead Free Copper Erosion

HDP User Group Project Facilitator: Jack Fisher

Synopsis:  Investigate the damage to PWB wiring patterns caused by copper erosion in lead-free assembly. Copper erosion can occur during dipping, wave soldering and rework processes.

For additional information visit the Alternative Alloy Study for Hole Fill and Copper Dissolution page or contact the HDP User Group Project Facilitator listed above.

Mechanical Fatigue Test for Solder Joint Reliability

HDP User Group Project Facilitator: Kazuhiko Nakamura

Synopsis: Shortening of the product development cycle requires a new method that can evaluate the reliability of solder joint in the short time instead of the conventional thermal cycle test.  There are several proposals on the solder joint reliability test using the mechanical fatigue test from universities and an institute.  Mechanical shear fatigue tests have been proposed to IEC standards.  There is little data for correlation on mechanical fatigue test and thermal cycle test.  This project will study on practicality and its issues of mechanical fatigue test as a solder joint reliability test.

For additional information visit the Mechanical Fatigue Test for Solder Joint Reliability page or contact the HDP User Group Project Facilitator listed above.

Mild Acceleration Factors

HDP User Group Project Facilitator: Laurence Schultz

Synopsis: The project team will work to determine if highly accelerated test conditions are introducing failure "modes" that don't exist in field (milder) conditions.

For additional information visit the Mild Acceleration Factors page or contact the HDP User Group Project Facilitator listed above.

Multiple Alloy Screening

HDP User Group Project Facilitator: Laurence Schultz

Synopsis: It is very difficult to make intelligent decisions on the viability of components using any of the new Lead Free solder ball alloys without data.  This screening experiment is intended to generate some of the needed data.

For additional information visit the Multiple Alloy Screening page or contact the HDP User Group Project Facilitator listed above.

Prediction of Lead Free Solder Joint Life by Indication of Microstructure Evolution

HDP User Group Project Facilitator: Brian Smith

Synopsis: Lead free is still controversial because there is no universal acceleration model and complex factors have a significant influence on life.  So the question is: How to predict the full life if you only have a board that has worked for a few years without any failure or crack?

For additional information visit the Predict Lead free Solder Joint Life page or contact the HDP User Group Project Facilitator listed above.

SAC Aging Factors

HDP User Group Project Facilitator: Laurence Schultz

Synopsis:  HDPUG SAC Acceleration Factors Project Observation: Aging of assembled test cards at 125C for 10 days prior to ATC testing affected thermal cycle reliability.  Others are reporting varying levels of a similar phenomenon (from significant to none).

For additional information visit the SAC Aging Factors page or contact the HDP User Group Project Facilitator listed above.

SAC Microvoids II

HDP User Group Project Facilitator: Laurence Schultz

Synopsis:   This project team seeks to provide the industry with best practices at PCB copper plating to reduce the liklihood of forming intermetallic compound voids during soldering.

For additional information visit the SAC Microvoids II page or contact the HDP User Group Project Facilitator listed above.

Underfill Process Guideline for Pb-free Leadless Devices

HDP User Group Project Facilitator: Laurence Schultz

Synopsis:  The solder joint reliability of leadless devices using lead free solder alloys such as SAC305 and SAC4405 has been significantly compromised.  The packaging industry has suggested underfill materials to mitigate the deficiency of the solder-joints.  While there are numerous choices of underfill materials, the CTE mis-match between substrates and Pb-free plating alloys complicates an already complex situation, increasing global CTE mis-match problems which leads to embrittlement issues.  A guideline describing best materials and practices for Lead Free underfills is needed.

For additional information visit the Underfill Process Guideline page or contact the HDP User Group Project Facilitator listed above.

Via-In-Pad

HDP User Group Project Facilitator: Brian Smith

Synopsis: Determine if void caused by microvia in pad has an effect on Lead Free solder joint reliability in BGAs and QFNs.

For additional information visit the Via-In-Pad page or contact the HDP User Group Project Facilitator listed above.

Mechanical Fatigue Test Phase 2

HDP User Group Project Facilitator: Kazuhiko Nakamura

Synopsis:  

Shortening of the product development cycle requires a new method that can evaluate the reliability of solder joint in the short time instead of the conventional thermal cycle test.  There are several proposals on the solder joint reliability test using the mechanical fatigue test from universities and an institute. 

The result of this project phase 1 showed that the solder joint fatigue life by SIT’s mechanical shear fatigue test has a good correlation with conventional temperaturecycling test’s for CSP packages.  Further study will be required for other packages to substitute mechanical  fatigue tests for conventional temperature cycling test.

The objective of project phase 2 is to study the similarities and differences on fatigue life in solder jointsof leadless packages (e.g. QFN package) between conventional temperaturecycling test and mechanical fatigue tests.

For additional information visit the Mechanical Fatigue Test for Solder Joint Reliability page or contact the HDP User Group Project Facilitator listed above.

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Lead Finish Projects

Component Terminal Finishes III

HDP User Group Project Facilitator: Ruben Bergman

Synopsis:  This project measures MSL results by surface treatment type and development results of new NiPd-based finishes for enhanced MSL, based on the results presented in Phases I and II.  Data includes the use of surface treatments and finishes such as Cu surface Zn-Cr coating (A2 coating), Micro Etching, Brown Oxidation Treatment and Surface Adhesion Promoter Coating.

For additional information visit the Component Terminal Finishes III page or contact the HDP User Group Project Facilitator listed above.

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Opto Electronics Projects

Opto Interconnect

HDP User Group Project Facilitator: Jack Fisher

Synopsis:  The project is in an early idea stage.  "Active Opto Cables" and an "Opto Interconnect Demonstrator" are two candidates for projects.  For additional information visit the Optoelectronics Project page or contact the HDP User Group Project Facilitator listed above.

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Power Supply Projects

Board Mount Power Supply (BMPS) Modules

HDP User Group Project Facilitator: Jack Fisher

Synopsis:  System integrators want to have well defined Lead Free requirements on Board Mount Power Supply (BMPS), Pin compatibility between functionally compliant BMPS, and industry standards for function compatibility of BMPS.  They also want to eliminate the need for modules to be attached using "press fit technology" or manual soldering.

For additional information visit the Module to PWB Interconnection page or contact the HDP User Group Project Facilitator listed above.

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 Semiconductor Packaging Projects

Advanced QFN Evaluation

HDP User Group Project Facilitator: Paul Collander

Synopsis: Key issue is how to design QFN device-, board- and solder footprint to enable easy assembly and reflow on boards assuring high solder connection yield on all pins and central pad. Focus is on relatively high pin-counts (up to 144) and separately on fine pitch (down to 0.3 mm). In addition to assembly and reliability tests, solder joint inspection methods may be elaborated.

For additional information visit the Advanced QFN Evaluation page or contact the HDP User Group Project Facilitator listed above.

3D Packaging SiP

HDP User Group Project Facilitator: Paul Collander

Synopsis: In order to multiply packaging density and improve high speed performance a SiP demonstrator will be developed, built and tested.  Solution is based on few chips embedded in organic substrate and few chips assembled on top of the same substrate.  Passives are also integrated in or on the substrate.  Outcome: Technology and electrical performance assessment.

For additional information visit the 3D Packaging SiP page or contact the HDP User Group Project Facilitator listed above.

Polymer Ball Interconnect

HDP User Group Project Facilitator: Brian Smith

Synopsis: Polymer balls to replace solderballs in BGAs and CSPs have been tried for many years with very different results depending on application and soldering process.  This project will look into ball manufacturers, multiple polymer compositions, coatings and soldering methods.  Reliability in drop test and thermal cycling for different size components and different amount of solder will be assessed.  Member companies representing different levels in the supply chain will together work out optimal solutions for telecom, mobile, medical and other applications.

For additional information visit the Polymer Ball Interconnect page or contact the HDP User Group Project Facilitator listed above.