Completed Projects
Completed Project data is available to HDP User Group Member Companies free. Information released to the general public can be purchased through the HDP User Group Publications page.
| Project Name | Completion Year |
| Halogen-Free | |
| Halogen-Free Materials Database | 2011 |
| Halogen-Free Assembly Reliability Phase 2 | 2010 |
| Halogen-Free Materials Guideline | 2008 |
| Environmental Assessment of Halogen-Free Printed Circuit Boards | 2004 |
| Evaluation of Environmentally Sensitive Material Content in IT Products | 2003 |
| Transition to Halogen-Free Electronics | 2002 |
| Lead Free | |
| Underfill Process Guideline for Pb-free Leadless Devices | 2011 |
| Mild Acceleration Factors | 2011 |
| Lead Free Board Material Reliability 2 | 2011 |
| Via-in-Pad | 2010 |
| Lead Free Guideline 3.0 | 2010 |
| SAC Microvoids II | 2010 |
| Multiple Alloy Screening | 2010 |
| Mechanical Fatigue Test for Solder Joint Reliability | 2009 |
| GPLF Optimization Study | 2008 |
| Lead Free Acceleration Factors | 2008 |
| Lead Free Board Material Reliability | 2008 |
| SAC Microvoids I | 2008 |
| GPLF Implementation Guideline, version 2.0 | 2005 |
| General Purpose Lead Free (GPLF) Guideline, version 1.0 | 2004 |
| Evaluation of the Solderability of an Alternate Alloy | 2004 |
| Low Temperature Lead Free Reliability Characterization | 2003 |
| Definition of Lead / Halide-Free Products | 2001 |
| Lead Finish | |
| Component Terminal Finishes Phase 2 | 2007 |
| Nickel-Palladium Based Component Terminal Finishes I | 2005 |
| Opto Electronics | |
| Materials and Reliability of Optical Packages | 2003 |
| Power Supply | |
| Board Mount Power Supply (BMPS) Application Guideline, version 2.0 | 2010 |
| Board Mount Power Supply (BMPS) Application Guideline, version 1.0 | 2007 |
| Component Packaging | |
| Integrated Circuit Attachment to Printed Electronic Substrates | 2011 |
| Thermo-Electromigration in WL-CSP Pb-Free Solder Joints II | 2010 |
| Thermo-Electromigration in WL-CSP Pb-Free Solder Joints | 2009 |
Halogen-Free Materials Database
HDP User Group Project Facilitator: Jack Fisher
Synopsis: Create a comprehensive online and searchable database of the properties and performance of Halogen Free components and materials available. Use the same test methods and sample preparation to generate the data, and present every supplier’s data in the same format.
NOTE: This project was converted into an activity to modify existing specifications through the specification organizations and is no longer active. No final report was produced.
For additional information visit the Halogen-Free Materials Database page or contact the HDP User Group Project Facilitator listed above.
Halogen-Free Assembly Reliability Phase 2 (2010)
Synopsis: Identify a PWB assembly that represents the more complex types of systems that want to go Halogen Free. Locate suppliers of Halogen Free components and assemble the boards using a Lead Free process. Test and evaluate the PWBAs to verify performance and reliability.
For additional information or to download the final report (Members only) visit the Halogen-Free Assembly Reliability Phase 2 page.
Halogen-Free Materials Guideline (2008)
Synopsis: Flame-retarded plastics are commonly needed to meet strict fire safety codes for electronic equipment. Certain halogenated compounds are used as flame retardants in a variety of applications including thermoplastics, insulation materials, component mold compounds, solder masks and printed circuit board laminates. Concerns have arisen that these materials may pose certain risks to health or the environment particularly at end-of-life. The project team will prepare a comprehensive Halogen-free Guideline.
For further information visit the project page or to download related documents visit the project's report page.
Environmental Assessment of Halogen-Free Printed Circuit Boards (2004)
Synopsis: The HDP User Group Design for Environment (DfE) group was formed in 2002 and was represented by companies such as Dell, Ericsson, HP, IBM, Intel and Nokia. The HDP User Group released two publicly-available reports regarding key environmental attributes of electronic products. Both reports were also presented at the 2003 and 2004 IEEE International Symposium on Electronics & the Environment
For further information visit the project page or to download related documents visit the project's report page.
Evaluation of Environmentally Sensitive Material Content in IT Products (2003)
Synopsis: Over the past several years, increased attention has been placed upon the potential environmental impacts of IT products. Largely due to the tremendous growth of electronics used in our every-day lives, environmental concerns have been raised regarding materials contained in electronic devices (e.g. lead solder), the power that electronic devices consume, and the growing number of electronic devices that end up in our waste streams. Both voluntary and regulatory measures have been taken to address some of these concerns. The purpose of the HDP User Group Design for the Environment (DfE) Project was to assess the material content of common IT products, leading to the development of data that could serve as the foundation for making future DfE decisions.
For further information visit the project page or to download related documents visit the project's report page.
Transition to Halogen-Free Electronics (2002)
Synopsis: While a fear on usage of human toxicity like solder is increasing, there is also an interest on human toxicity of halogen flame retardant. Bromine based flame-retardant is widely used as the halogen based flame retardant due to the cost and the performance. In many cases, the plastic components used for an electric device also use the bromine system flame-retardants for the flame retardant. Therefore, the change to an alternative material system is advancing.
For further information visit the project page or to download related documents visit the project's report page.
Underfill Process Guideline for Pb-free Leadless Devices
HDP User Group Project Facilitator: Laurence Schultz
Synopsis: The solder joint reliability of leadless devices using lead free solder alloys such as SAC305 and SAC4405 has been significantly compromised. The packaging industry has suggested underfill materials to mitigate the deficiency of the solder-joints. While there are numerous choices of underfill materials, the CTE mis-match between substrates and Pb-free plating alloys complicates an already complex situation, increasing global CTE mis-match problems which leads to embrittlement issues. A guideline describing best materials and practices for Lead Free underfills is needed.
Note: This project was concluded in favor of other activities on-going in the industry. No final report was generated.
For additional information visit the Underfill Process Guideline page or contact the HDP User Group Project Facilitator listed above.
Mild Acceleration Factors
HDP User Group Project Facilitator: Laurence Schultz
Synopsis: The project team will work to determine if highly accelerated test conditions are introducing failure "modes" that don't exist in field (milder) conditions.
For additional information visit the Mild Acceleration Factors page or contact the HDP User Group Project Facilitator listed above.
Lead Free Board Materials Reliability Phase 2
HDP User Group Project Facilitator: Brian Smith
Synopsis: This is a follow up to the Lead Free Board Materials Reliability Project. The project conducts an extensive evaluation of the electrical and mecahnical performance of latest generation PWB laminates. Of particular focus is how the laminates behave through Pb-Free surface mount reflow conditions. The test program therefore analyzes the materials both before and after 6 reflow cycles peaking at 260 deg C.
For additional information visit the Lead Free Board Materials Reliability Phase 2 page or contact the HDP User Group Project Facilitator listed above.
Via-In-Pad
HDP User Group Project Facilitator: Brian Smith
Synopsis: Determine if void caused by microvia in pad has an effect on Lead Free solder joint reliability in BGAs and QFNs.
For additional information or to download the final report (Members only) visit the Via-In-Pad page.
Lead Free Guideline version 3.0 (2010)
Synopsis: New information has been available about Lead free assembly after the GPLF Guideline was released. The project team will collect information needed for updating the HDP User Group "GPLF Guideline 2.0" released in 2005 and assemble a "LF Guideline version 3.0". To obtain a copy of the previous version please visit the Publications page.
For additional information visit the Lead Free Guideline version 3.0 page.
SAC Microvoids II
HDP User Group Project Facilitator: Laurence Schultz
Synopsis: This project team seeks to provide the industry with best practices at PCB copper plating to reduce the liklihood of forming intermetallic compound voids during soldering.
For additional information or to download the Final Report (Members Only) visit the SAC Microvoids II page.
Multiple Alloy Screening
HDP User Group Project Facilitator: Laurence Schultz
Synopsis: It is very difficult to make intelligent decisions on the viability of components using any of the new Lead Free solder ball alloys without data. This screening experiment is intended to generate some of the needed data.
For additional information or to download the final report (Members only) visit the Multiple Alloy Screening page.
Mechanical Fatigue Test for Solder Joint Reliability (2009)
HDP User Group Project Facilitator: Kazuhiko Nakamura
Synopsis: Shortening of the product development cycle requires a new method that can evaluate the reliability of solder joint in the short time instead of the conventional thermal cycle test. There are several proposals on the solder joint reliability test using the mechanical fatigue test from universities and an institute. Mechanical shear fatigue tests have been proposed to IEC standards. There is little data for correlation on mechanical fatigue test and thermal cycle test. This project will study on practicality and its issues of mechanical fatigue test as a solder joint reliability test.
For additional information visit the Mechanical Fatigue Test for Solder Joint Reliability page.
GPLF Optimization Study (2008)
Synopsis: A preliminary set of trials were conducted to determine the peak temperature variation between different types of components on sample boards when solder using a variety of different sets of reflow parameters. Several optmized profiles that minimized both temperature variation and max peak temperature on the hottest components were developed and these profiles were used to produce over 100 test vehicles. Post assembly analysis was conducted on sample TVs and the rest were submitted for accelerated temperature cycling. Daisy chains within the components were continuously monitored and Weibull analysis / failure anaysis were conducted on failed parts.
For additional information visit the project page.
Lead Free Acceleration Factors (2008)
Synopsis: Numerous papers indicate that ATC test conditions have a different effect on the results of SAC solder fatigue life than they do on SnPb solder fatigue life.
For additional information visit the project page or to download related documents visit the project's report page.
Lead Free Board Material Reliability (2008)
Synopsis: There are numerous laminates available to the PCB designer today. Some of these laminates have been around for a number of years and the designers and OEM's understand their capabilities and limitations. However with the advent of lead free solders and their higher processing temperatures new laminates that are designated "Lead Free Capable" are appearing.
For further information visit the project page or to download related documents visit the project's report page.
SAC Microvoids I (2008)
Synopsis: The purpose of this project was to measure the effects of bath parameters and other treatments upon the intermetallic compound layer and the root cause of brittle fractures in SAC Alloys-Microvoids, and to support Electronic Industry efforts to improve the reliability of SAC Alloys.
For further information visit the project page or to download related documents visit the project's report page.
GPLF Implementation Guideline, version 2.0 (2005)
Synopsis: This is a continuation of the activiy in the GPLF Guideline I project, and resulted in a major revision to the Guideline produced in the GPLF I project.
For further information visit the project page or to download related documents visit the project's report page.
General Purpose Lead Free (GPLF) Guideline, version 1.0 (2004)
Synopsis: This implementation guideline has considered industry-wide Pb-free development efforts and focused on presenting a common, compatible lead-free solder system that would facilitate the introduction of Pb-free products by system integrators and EMS providers.
For further information visit the project page or to download related documents visit the project's report page.
Evaluation of the Solderability of an Alternate Alloy (2004)
Synopsis: This project is a part of General Purpose Lead Free assembly system, which has been planned to define a guideline compatible with tin-lead based soldering. Although tin-silver-copper solder pastes are in mainstream of lead-free, the composition of the pastes differs in areas. Europeans and North Americans would like to use Sn- (3.8-4.0) Ag- (0.6-0.7) Cu, whereas Japanese would like to use Sn-3.0Ag-0.5Cu. As HDP User Group had not had any experimental data about the Sn-3.0Ag-0.5Cu paste, the Japanese team decided to evaluate the solderability of this composition as an Alternate Solder Alloy.
For further information visit the project page or to download related documents visit the project's report page.
Low Temperature Lead Free Reliability Characterization (2003)
Synopsis: The purpose of the effort was to evaluate the reliability of a low temperature (170-180 °C) lead free soldering process as an alternative to the more common high temperature (250–260 ºC) process.
For further information visit the project page or to download related documents visit the project's report page.
Definition of Lead Free / Halide-Free Products (2001)
Synopsis: This project was organized to develop a draft definition/specification of Lead-Free and Halogen-Free materials as it applies to electronic components and Printer Wiring Boards and get it accepted on a global scale. The specification can allow manufacturable alternative materials to be developed and an “affordable” cost, while meeting the intent of legislative directives aimed at minimizing environmental concerns.
For further information visit the project page or to download related documents visit the project's report page.
Component Terminal Finishes Phase 2 (2007)
Synopsis: Various techniques have been proposed to reduce the Sn-whisker risk with matte Sn finishes. Nevertheless, most end users of electronic still have concerns about long term Sn-whisker growth risk with Sn based terminal finishes. NiPd-based Pre-Plated lead Leadframe (PPF) finishes have been introduced as one Pb-free alternative with no Sn-whisker risk. An improved technology that overcomes the technical limitations of the existing NiPd-based finishes has been developed and applied extensively, but degradation in the Moisture Sensitivity Level (MSL) of a package component due to the limited adhesion quality between compound and noble metal surface and the increase in Pb-free SMT temperature (260℃) has occurred more frequently with NiPd-based finish packages.
For further information visit the project page or to download related documents visit the project's report page.
Nickel-Palldium Based Component Terminal Finishes I (2005)
Synopsis: Erroneous perceptions such as high cost driven by Pd content and price, quality problems at board mounting, and package reliability limits MSL(Moisture Sensitivity Level) have led some IC component suppliers to reject adopting or even evaluating NiPd based PPFs.
For further information visit the project page or to download related documents visit the project's report page.
Materials and Reliability of Optical Packages (2003)
Synopsis: The purpose of the project was to develop a knowledge and database system enabling materials selection for assembly of dimensionally stable optical and optoelectronic modules and to propose suitable approaches for modeling non-elastic deformation of polymers in optical modules.
For further information visit the project page or to download related documents visit the project's report page.
Board Mount Power Supply (BMPS) Guideline, version 2.0 (2010)
Synopsis: The project team will prepare and edit a "BMPS Guideline" document at the base technology level. The output will be provided to industry groups to encourage them to address needed industry standards. This is an update and extension of the information available in the BMPS Guideline version 1.0. To obtain a copy of the previous version please visit the Publications page.
For additional information visit the Board Mount Power Supply Guideline 2.0 page. To download a copy of the document, visit the BMPS Guideline 2.0 Document Page.
Board Mount Power Supply (BMPS) Application Guideline, version 1.0 (2007)
Synopsis: HDP User Group has investigated the interest by its system integrator members of forming a "Requirement Reference Group” enabling PSMA and EPSMA member companies to design their products to the needs of potential customers.
For further information visit the project page or to download related documents visit the project's report page.
Integrated Circuit Attachment to Printed Electronic Substrates (2011)
HDP User Group Project Facilitator: Brian Smith
Synopsis: Printed electronics is a rapidly emerging interconnect technology which utilizes conventional high volume paper printing techniques to define interconnect and passive devices on electronic flexible substrates. The technology (typically using reel to reel manufacturing processes) offers extensive cost reduction opportunities compared with standard PWB fabrication processes and opens up new markets in very low cost disposable electronics. This project will focus on the attachment of integrated circuits to printed electronic substrates to achieve a higher level of functionality . Component mounting techniques will be researched and a high volume assembly process consistent with the low cost demands for this technology will be identified and evaluated.
For additional information visit the Integrated Circuit Attachment to Printed Electronic Substrates page or contact the HDP User Group Project Facilitator listed above.
Thermo-Electromigration in WL-CSP Pb-free Solder Joints (2009)
Synopsis: Owing to the ban of Pb-based solder in consumer electronic products and the trend of miniaturization in wireless and portable devices, the reliability of Pb-free solder interconnection is one of the most challenging problems in electronic manufacturing industry, especially the failure caused by thermo-electromigration. Joule heating due to the on-chip A1 interconnect has generated thermo-migration to accompany electromigration in solder joints. These effects can be cumulative in certain circumstances and lead to early joint failure. This project will determine mean-time-to-failure (MTTF) of thermo-electromigration in SnAgCu solders of low Ag with different dopants at current density from 1.5 x 103 to 1.5 x 104 A/cm2, test methods and equipment designed by Professor King-Ning Tu of the University of California Los Angeles (UCLA) will be used.
For further information visit the project page.
TE-Migration II (2010)
HDP User Group Project Facilitator: Marshall Andrews
Synopsis: To determine mean-time-to-failure (MTTF) of thermo-electromigration in SnAgCu solders of low Ag with different dopants and different UBM at two current densities of 5 x 103 and 1 x 104 A/cm2 and at two temperatures of 125 and 150.
For additional information visit the TE-Migration II page or contact the HDP User Group Project Facilitator listed above.